Semiconductor-on-insulator (SOI) technology relates to high-speed MOS and CMOS circuits. According to SOI, a thin layer of semiconductor material is deposited on an insulator to reduce the capacitive coupling between the semiconductor layer and the underlying substrate material.
CMOS FET gates are subjected to charging that can degrade gate insulator quality. Typically, circuits on a semiconductor chip include at least one protective component. A common solution in bulk CMOS is to connect a diode between the FET gate and the FET body at the first wiring, or metal, level available. This is the floating-gate protect diode (FGPD). The FGPD is electrically isolated from the FET source and drain and require a small area, for example, a single contact, in bulk CMOS.
Charge accumulated in the FET gate during subsequent processing will discharge through the FGPD into the FET body and not through the FET insulator. Thus, damage to the insulator is avoided.
However, inherent to silicon-on-insulator (SOI) structures is the inability to form dense diodes between the FET gate and body that are electrically isolated from the FET source and drain.